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https://hku.zoom.us/j/99560814530?pwd=LFn4ZjbMRgDM3WlSnZv4fSQSwv6EiB.1

Meeeting ID: 995 6081 4530

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Abstract:

Over the past few decades, photonic integrated circuits (PIC) have witnessed a remarkable growth. In contrast to the fiber system, PIC not only reduces its size to integrate more devices but also boosts higher processing speed and lower power consumption. Given these advantages, PIC holds great potential for wide application in areas such as data processing, communication, quantum photonics, and sensing. A low-loss waveguide is crucial for enhancing the performance of PIC applications. Nanoimprint lithography (NIL), as a large-scale and low-cost manufacturing process, is considered in fabricating PIC. However, during the fabrication processes, the inevitable sidewall roughness induced scattering loss will occur in the waveguide and exert a negative impact on the applications.

Here, we propose a fabrication process analysis method for the sidewall roughness of PIC waveguides. By analyzing the power spectral density (PSD) of the sidewall roughness in spatial frequency, we can indicate the roughness frequency response of each fabrication process. The feasibility of this method has been confirmed through the waveguide sidewall roughness analysis of the fabrication process of thermal NIL. By comparing the PSD of the sidewall roughness of laser direct writing lithography, silicon mold etching, and thermal NIL, the results initially confirm that different fabrication processes have distinct roughness frequency responses. This method can also be employed to evaluate the spatial frequency variation of sidewall roughness in other fabrication processes.

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